Electro-optical apparatus, matrix substrate, and electronic unit

ABSTRACT

To provide an electro-optical apparatus having a power-supply wiring structure that is capable of supplying a sufficient electrical power to a common electrode of electro-optical devices. 
     An electro-optical apparatus according to the present invention comprises electro-optical devices having a laminated structure including first electrode layers formed on or above a viewing area  11  of a substrate  15  and a second electrode layer  14  formed on or above the first electrode layers, the laminated structure further including first power lines for supplying a voltage to the first electrode layers and second power wiring  16  electrically connected to the second electrode layer, wherein the first power lines and the second power lines are arranged on or above the viewing area and are arranged in the same layer as the first electrode layers or below the first electrode layers.

This is a Continuation of Application Ser. No. 10/637,638, filed Aug.11, 2003 now U.S. Pat. No. 6,887,100. The entire disclosure of the priorapplication is hereby incorporated by reference herein in its entirety.

TECHNICAL FIELD

The present invention relates to the structure of power-supply wiringsuitable for an electro-optical apparatus having electro-opticaldevices.

BACKGROUND ART

Organic electroluminescent (EL) devices, which are current-drivenspontaneous light-emitting devices, have the advantages of requiring nobacklight, low power consumption, wide viewing angle, and high contrast,and thus look promising for developing flat-panel displays. Organic ELdevices are electro-optical devices in which a light-emitting layerhaving a fluorescent material is interposed between an anode and acathode. Providing a forward-biased current between both electrodescauses positive holes injected from the anode and electrons injectedfrom the cathode to recombine. By the resultant recombination energy,the organic EL device emits light. In other words, in order to causelight emission in the organic EL device, it is necessary to supply powerfrom an external circuit. Typically, known active-matrix-addressing-typeorganic EL display panels use such a structure, that is, a pixelelectrode, as the anode, is disposed for each pixel in a pixel area anda common electrode, as the cathode, covers the entire pixel area.Japanese Unexamined Patent Application Publication No. 11-24606 (PatentDocument 1), for example, discloses a display device with reduced powerconsumption and improved luminous efficiency by optimizing the wiringlayout.

[Patent Document 1] Japanese Unexamined Patent Application PublicationNo. 11-24606

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention

In realizing a display panel using the electro-optical devices, thewiring resistance of the common electrode is an issue. Specifically, ahigher wiring resistance of the common electrode leads to an increasedvoltage drop in pixels in the center of the screen, thereby failing tosupply sufficient current to the central part of the screen. As aconsequence, a gray-scale is not displayed accurately and displayperformance decreases. This matter may become a serious problem in alarger display panel because the wiring resistance of the commonelectrode becomes higher. Decreasing the resistance of the commonelectrode is a problem to be solved especially in a so-calledtop-emission structure, in which light is emitted from the side of atransparent cathode, since a material has not yet been developed thathas the same level of low resistance as a metal layer and that is alsosuitable for a light-transmitting electrode.

Accordingly, an object of the present invention is to propose anelectro-optical apparatus and a matrix substrate having a structure forpower-supply wiring that is capable of providing a sufficient power to acommon electrode of electro-optical devices. Moreover, an object of thepresent invention is to provide an electro-optical apparatus and amatrix substrate that are capable of reducing the width of a displaypanel frame.

Means for Solving the Problems

An electro-optical apparatus according to the present inventioncomprises electro-optical devices having a laminated structure includingfirst electrode layers formed on or above a viewing area of a substrateand a second electrode layer formed on or above the first electrodelayers, the laminated structure further including first power lines forsupplying a voltage to the first electrode layers and second power lineselectrically connected to the second electrode layer, wherein the firstpower lines and the second power lines are arranged on or above theviewing area and are arranged in the same layer as the first electrodelayers or below the first electrode layers.

As described above, the second power lines electrically connected to thesecond electrode layer are formed in any layer of the laminatedstructures formed above the viewing area of the substrate so thatsufficient electric power is supplied even if the second electrode layershow high resistance. Furthermore, joints electrically connecting thesecond electrode layer with the second power lines are included withinthe laminated structures, thus reducing the width of a display panelframe.

The term “the electro-optical devices” means general electronic devicesthat change optical states of light by electrical operations and includea self-luminous device such as an electroluminescent device and anelectronic device displaying a gray-scale by varying a state ofdeflection of light, such as a liquid crystal device. “The viewing area”means an area in the substrate used for electro-optical displays, i.e.,an area in which the electro-optical devices are formed and isequivalent to “a display area” of embodiments in the present invention.“The laminated structures” mean laminated structures comprising variousthin films laminated on or above the substrate and include not onlydevice layers comprising the electro-optical devices but also aninsulating interlayer film, the electrode layers, the power lines, andthe like. Electronic devices such as a transistor may lie between thefirst electrode layers and the first power lines in the invention. Thefirst power lines and the second power lines may be formed in the samelayer for the sake of convenience in the manufacturing process or may beformed in different layers.

In the electro-optical apparatus according to the present invention,preferably, the first power lines and the second power lines aredisposed in the same layer at least partially, thus simplifying themanufacturing process.

In the electro-optical apparatus according to the present invention,preferably, the second electrode layer functions as a cathode for theelectro-optical devices. The second electrode layer functioning as thecathode allows a reduction in resistance of the cathode in theelectro-optical devices.

In the electro-optical apparatus according to the present invention,preferably, the second power lines function as auxiliary cathode lines.Thereby, a sufficient electrical power is supplied to the cathode in theelectro-optical devices.

In the electro-optical apparatus according to the present invention,preferably, the second electrode layer has light transmission. Thereby,a top-emission structure in which light is emitted through the secondelectrode layer is achieved, thus increasing an aperture ratio.

In the electro-optical apparatus according to the present invention,preferably, the second power lines are formed linearly in any one oflayers of the laminated structure at a predetermined density.Distributing the second power lines at the predetermined density allowsa reduction in resistance of the second electrode layer.

In the electro-optical apparatus according to the present invention,preferably, the second power lines and the second electrode layer areformed in different layers of the laminated structure and areelectrically connected to each other within the laminated structure.Positions where the second power lines are electrically connected to thesecond electrode layer are disposed within the laminated structures,thus reducing the width of a display panel frame.

In the electro-optical apparatus according to the present invention,preferably, positions where the second power lines are electricallyconnected to the second electrode layer are disposed along the directionin which the second power lines extend at multiple positions. The secondpower lines and the second electrode layer are electrically connected atthe multiple positions so that a reduction in resistance of the secondelectrode layer is achieved.

In the electro-optical apparatus according to the present invention,preferably, the second power lines and the second electrode layer areformed in different layers with an insulating interlayer film disposedtherebetween and are electrically connected to each other throughcontact holes formed in the insulating interlayer film. The second powerlines and the second electrode layer are formed in different layers ofthe laminated structure so that manufacturing processes thereof areseparated.

In the electro-optical apparatus according to the present invention,preferably, the electro-optical devices are arranged in twosubstantially orthogonal directions, and the second power lines arearranged in a direction substantially along the direction in whicheither direction of the two orthogonal directions in which theelectro-optical devices are arranged. The direction of arranging thesecond power lines is along the direction in which the direction ofarranging the electro-optical devices so that sufficient electricalpower is supplied to the second electrode layer of the electro-opticaldevices arranged in the two orthogonal directions.

In the electro-optical apparatus according to the present invention,preferably, the second power lines are disposed at substantially equalpitch. The second power lines are equally spaced so that electricalpower is uniformly supplied to each of the electro-optical devicesdisposed in the two orthogonal directions.

In the electro-optical apparatus according to the present invention,preferably, the electro-optical devices are electroluminescent devices.The electroluminescent device is used so that a luminance gray-scale isadjusted by a driving current.

An electronic unit according to the present invention includes theabove-described electro-optical apparatus. The electronic unit may be ofany type as long as it includes a display apparatus. The electronic unitmay be a mobile phone, a video camera, a personal computer, ahead-mounted display, a projector, a facsimile machine, a digitalcamera, a mobile television, a DSP apparatus, a PDA, or an electronicnotepad.

A matrix substrate according to the present invention formselectro-optical devices consist of a laminated structure comprisingfirst electrode layers and a second electrode layer, the matrixsubstrate further comprising the first electrode layers formed on orabove a substrate; first power lines supplying a voltage to the firstelectrode layers; and second power lines electrically connected to thesecond electrode layer to be formed on or above the first electrodelayers, wherein both of the first power lines and the second power linesare arranged on or above the viewing area and are arranged in the samelayer as the first electrode layers or below the first electrode layers.

As described above, the second power lines are electrically connected tothe second electrode layer in either layer of the laminated structure ofthe electro-optical devices to be laminated on or above the viewing areaof the substrate so that sufficient electric current is supplied to eachof the electro-optical devices even if the second electrode layer showshigh resistance. Furthermore, positions where the second power lines areelectrically connected to the second electrode layer are disposed withinthe laminated structures, thus reducing the width of a display panelframe. The term “matrix substrate”, as used in here, means a wiringsubstrate in which the electro-optical devices have not been formed.

In the matrix substrate according to the present invention, preferably,the first power lines and the second power lines are disposed in thesame layer at least partially, thus simplifying the manufacturingprocess.

In the matrix substrate according to the present invention, preferably,the second electrode layer functions as a cathode for theelectro-optical devices, thus reducing resistance of the cathode of theelectro-optical devices.

In the matrix substrate according to the present invention, preferably,the second power lines function as auxiliary cathode wiring, therebysupplying sufficient electrical power to the cathode of theelectro-optical devices.

In the matrix substrate according to the present invention, preferably,the second electrode layer has light transmission.

Thereby, a top-emission structure in which light is emitted from thesecond electrode layer is achieved, thus raising an aperture ratio.

In the matrix substrate according to the present invention, preferably,the second power lines are formed linearly in any one of layers of thelaminated structure at a predetermined density. Distributing the secondpower lines at the predetermined density allows a reduction inresistance of the second electrode layer.

In the matrix substrate according to the present invention, preferably,the second power lines and the second electrode layer are formed indifferent layers of the laminated structure and are electricallyconnected to each other within the laminated structure. Positions wherethe second power lines are electrically connected to the secondelectrode layer are disposed within the laminated structures, thusreducing the width of a display panel frame.

In the matrix substrate according to the present invention, preferably,the second power lines are electrically connected to the secondelectrode layer are disposed along the direction in which the secondpower lines extend at multiple positions.

The second power lines and the second electrode layer are electricallyconnected at the multiple positions so that a reduction in resistance ofthe second electrode layer is achieved.

In the matrix substrate according to the present invention, preferably,the second power lines and the second electrode layer are formed indifferent layers with an insulating interlayer film disposedtherebetween, and the second power lines and the second electrode layerare electrically connected to each other through contact holes formed inthe insulating interlayer film The second power lines and the secondelectrode layer are formed in different layers of the laminatedstructure so that manufacturing processes thereof are separated.

In the matrix substrate according to the present invention, preferably,the electro-optical devices are arranged in two substantially orthogonaldirections, and the second power lines are arranged in a directionsubstantially along the direction in which either direction of the twoorthogonal directions in which the electro-optical devices are arranged.The direction of arranging the second power lines is along the directionin which the direction of arranging the electro-optical devices so thatsufficient electrical power is supplied to the second electrode layer ofthe electro-optical devices arranged in the two orthogonal directions.

In the matrix substrate according to the present invention, preferably,the second power lines are disposed at substantially equal pitch. Thesecond power lines are equally spaced so that electrical power isuniformly supplied to each of the electro-optical devices disposed inthe two orthogonal directions.

BEST MODE FOR CARRYING OUT THE INVENTION First Embodiment

The embodiment will be illustrated with reference to the drawings.

FIG. 1 shows an entire block diagram of an active-matrix-type organic ELdisplay panel 100 of the embodiment. As illustrated in FIG. 1, aplurality of pixels 10, a scanning line driver 12, and a data linedriver 13 are disposed on or above a substrate 15. The plurality ofpixels 10 have laminated structures disposed on a display area 11. Thescanning line driver 12 outputs scanning signals to scanning lines,which are disposed in a row direction and connected to a group of thepixels 10. The data line driver 13 supplies data signals and powersupply voltages to data lines and power supply lines, respectively. Thedata lines and the power supply lines are disposed in a column directionand connected to a group of the pixels 10. The pixels 10 form an N-row,M-column pixel matrix, in which the row direction and the columndirection are disposed orthogonally and form a pixel matrix. Each of thepixels 10 includes an organic EL device emitting light with red, green,and blue (RGB), the three primary colors. The entire surface of thelaminated structure disposed on the display area 11 is covered with afilm of a cathode 14 which serves as a common electrode. The cathode 14is preferably made of a material that is capable of injecting as manyelectrons as possible, i.e., a material having a low work function.Preferably, such a conductive material is a thin metal film made ofcalcium, lithium, or aluminum.

The organic EL display panel 100 has a bottom-emission structure thatemits light through the substrate 15; however, the present invention isnot limited to this structure. The organic EL display panel 100 may havea so-called top-emission structure that emits light through the cathode14 if the cathode 14 is a light-transmitting conductive film. In theorganic EL display panel 100 having the top-emission structure, thecathode 14 may be formed of a semitransparent conductive metal layerobtained by processing a thin metal film such as a calcium, lithium, oraluminum film to be thin so as to be able to transmit a light, inaddition to a light-transmitting conductive material such as an indiumtin oxide (ITO). Such a semitransparent conductive metal layer allowsthe cathode 14 to have low resistance.

FIG. 2 shows a main circuit of one of the pixels 10. The pixel 10includes a switching transistor Tr1, a driving transistor Tr2, a storagecapacitor C, and a light-emitting section OLED. The two transistorscontrol the driving of the pixel 10. The switching transistor Tr1 is ann-channel FET, in which the gate terminal is connected to a scanningline V_(sel) and the drain terminal is connected to a data line I_(dat).The driving transistor Tr2 is a p-channel FET, in which the gateterminal is connected to the source terminal of the switching transistorTr1. In the driving transistor Tr2, the source terminal is connected toa power supply line V_(dd) and the drain terminal is connected to thelight-emitting section OLED. The storage capacitor C is provided betweenthe gate terminal and the source terminal of the driving transistor Tr2.In the above-described arrangement, when a selection signal is output tothe scanning line V_(sel) and when the switching transistor Tr1 isopened, a data signal supplied over the data line I_(dat) is written inthe storage capacitor C as a voltage. The written voltage in the storagecapacitor C is then stored during one frame period, changing aconductance of the driving transistor Tr2 in an analog fashion andproviding a forward-biased current corresponding to a luminancegray-scale to the light-emitting section OLED.

FIG. 3 illustrates the wiring layout in a pixel area. In order todecrease resistance of the cathode 14, in the present invention, fineauxiliary cathode wiring 16 is formed in a layer different from the widecathode 14 covering the upper surface of the laminated structurelaminated on the display area 11. The cathode 14 is electricallyconnected to the auxiliary cathode wiring 16 with an insulatinginterlayer film disposed therebetween. The auxiliary cathode wiring 16may be formed in any layer, however in view of a display manufacturingprocess, however, the auxiliary cathode wiring 16 are preferably formedin the same layer as metal wiring such as the scanning lines V_(sel) inthe same manufacturing process, thus simplifying the overall process andallowing low manufacturing cost. The auxiliary cathode wiring 16 thatare formed in the same process as the scanning lines V_(sel) may becalled a gate metal layer. The auxiliary cathode wiring 16 arepreferably positioned on dead spaces of the pixels 10. Since the deadspaces vary according to the layout of the pixels 10, the auxiliarycathode wiring 16 should be disposed at the most suitable position inconsideration of the positions of the data lines I_(dat), the scanninglines V_(sel), power supply lines V_(dd), the switching transistors Tr1or the like. In the case of overlapping the auxiliary cathode wiring 16with the data lines I_(dat), a parasitic capacitance may be producedbetween the data lines I_(dat) and the auxiliary cathode wiring 16,resulting in insufficient data writing to the storage capacitor C.Therefore, the positional relationship with the data lines I_(dat)should be considered when forming the auxiliary cathode wiring 16.

In this embodiment, one auxiliary cathode line 16 and a pair of thescanning lines V_(sel) are laid out alternately in the row direction. Inother words, N/2 auxiliary cathode wiring 16 are disposed in such a waythat one auxiliary cathode line 16 appears every other row. The scanninglines V_(sel) and the auxiliary cathode wiring 16 are produced bysimultaneously patterning the metal wiring in the same layer,respectively. The width of one auxiliary cathode line 16 is adjusted soas to substantially be equal to the sum of the widths of the pair of thescanning lines V_(sel). One data line I_(dat) and one power supply lineV_(dd) are disposed in every column in the column directionrespectively. The pattern of wiring shown in FIG. 3 illustrates aperiodically repeating unit which is applied to all of the pixels 10 ina laminated structure. The layout of wiring in this embodiment issymmetrical about any line, and the pitches of the pixels in the rowdirection and column direction are determined uniformly. Each of theswitching transistors Tr1 resides at the intersection of the data lineI_(dat) and the scanning line V_(sel). The gate terminal of each of thedriving transistors Tr2 is oriented in the direction in which the sourceterminal of the switching transistor Tr1 extends. The drain terminal ofthe driving transistor Tr2 is connected to each of pixel electrodes 17through a contact hole h1. The storage capacitors C are formed in thelongitudinal direction of the pixel electrode 17 above the power supplylines V_(dd).

FIG. 4 is a cross-sectional view taken along the line A-A′ of FIG. 3.Referring to FIG. 4, a laminated structure 30 in which the auxiliarycathode line 16, an insulating interlayer film 21, source metal layers22, a planarizing film 20, ITO layers 18, and a bank layer 19 aresequentially laminated is formed in the display area 11 on the substrate15. The upper surface of the laminated structure 30 is covered with thecathode 14. The insulating interlayer film 21 is a insulating film toelectrically separate the data lines I_(dat) and the scanning linesV_(sel) from the auxiliary cathode wiring 16. The islanded source metallayers 22 which are patterned in the same process as the data linesI_(dat) and the scanning lines V_(sel) are formed on the insulatinginterlayer film 21. The source metal layers 22 are connected to theauxiliary cathode line 16 through contact holes h5 formed in theinsulating interlayer film 21. The planarized insulating film 20 isformed on the insulating interlayer film 21. The islanded ITO layers 18are formed by patterning on the planarizing film 20. The ITO layers 18are connected to the source metal layers 22 through contact holes h3formed in the planarizing film 20. The contact holes h3 are formed atmultiple positions along the direction in which the auxiliary cathodeline 26 extends. Preparing many joints connecting the ITO layer 18 andthe source metal layer 22 allows a reduction in the electricalresistance.

On the other hand, the upper surface of the planarizing film 20 iscovered with the bank layer 19, which is made of a photosensitiveorganic material or the like. The bank layer 19 is a component forpartitioning the pixels 10. Oval openings h2 are opened by a precisealignment so as to position on the pixel electrodes 17 (see FIG. 3). Onportions where the surfaces of the pixel electrodes 17 are exposedthrough the openings h2, positive-hole transporting layers andlight-emitting layers are formed sequentially from the lower layeradjacent to the substrate. Additionally, the cathode 14 as a commonelectrode is formed so as to cover the upper surface of the laminatedstructure 30 disposed on the display area 11. In this way,light-emitting sections OLED are formed, which consist of the cathode,the light-emitting layer, the positive-hole transporting layer, and onepixel electrode.

The laminated structure of the device layer constituting thelight-emitting section OLED is not limited to the above-describedconfiguration. Other examples of the laminated structure are as follows:a cathode, a light-emitting layer, and a pixel electrode; a cathode, anelectron transporting layer, a light-emitting layer, and a pixelelectrode; a cathode, an electron transporting layer, a light-emittinglayer, a positive-hole transporting layer, and a pixel electrode. Infact, a positive-hole transporting layer and an electron transportinglayer are necessarily required and these layers may be added freely. Thepositive-hole transporting layer may be a triphenylamine derivative(TPD), a hydrazine derivative, or an arylamine derivative. The electrontransporting layer may be an aluminum-quinolinol complex (Alq₃), adistyrylbiphenyl derivative (DPVBi), an oxadiazole derivative, abistyrylanthracene derivative, a benzoxazolethiophene derivative,perylenes, or thiazoles. The light-emitting layer is not limited to anorganic material and may be made of an inorganic material.

In the surface of the bank layer 19, openings h4, which are alignedprecisely at multiple positions communicating to the ITO layers 18, aredisposed in the direction in which the auxiliary cathode line 16 extendsat multiple positions. The cathode 14 covering the bank layer 19 isconnected to the ITO layers 18 through the contact holes h4 and is alsoconnected to the auxiliary cathode line 16 through the source metallayers 22. In this way, the auxiliary cathode line 16 formed in thelaminated structure 30 is connected to the cathode 14 so that theelectrical resistance decreases and thus sufficient current is suppliedto each of the pixels 10.

This embodiment allows a reduction in the resistance of the cathode 14and in luminance non-uniformity resulting from non-uniformity of thecurrents supplied to the pixels 10. Contact areas for the cathode 14with the cathode power supply lines lie in a frame of the display panelin known panels. According to this embodiment, such contact is ensuredby the laminated structure 30, thus reducing the width of the frame andresulting in a display panel with smaller dead space. Since the banklayer, which is made of the organic material, has low resistance to heatand chemicals, it is difficult to form the auxiliary cathode line 16 onthe bank layer, but it is easy to form metal wiring such as theauxiliary cathode line 16 on the substrate 15 provided with the FET orthe like.

Although one auxiliary cathode line 16 is disposed every two rows inthis embodiment, it is not limited therto and the auxiliary cathodewiring 16 may be disposed at any suitable density such as one line everyn rows (n is an integer more than two). The position of the auxiliarycathode line 16 is not limited to on the substrate 15; it may be in anylayer of the laminated structure 30.

Second Embodiment

FIG. 5 shows the layout of wiring in an organic EL display panel 100according to a second embodiment of the present invention. Thisembodiment differs from the first embodiment on the point of thatauxiliary cathode wiring 16 are disposed in the column direction.Referring to FIG. 5, where one pixel consists of three RGB pictureelements, three auxiliary cathode wiring 16 are spaced uniformly everytwo pixels in the column direction. Two data lines I_(dat) are disposedat two sides of each auxiliary cathode line 16. Between adjacentauxiliary cathode wiring 16, two power supply lines V_(dd) are formed asa pair. The sum of the widths of the one auxiliary cathode line 16 andthe two data lines I_(dat) is substantially equal to the sum of thewidths of the pair of power supply lines V_(dd). Thereby, the layout ofthe wiring shown in this figure is arranged so as to have symmetry aboutany column. On the other hand, in the row direction, one of scanninglines V_(sel) is disposed in each row. Each of switching transistors Tr1resides at the intersection of the scanning line V_(sel) and one dataline I_(dat). The gate terminal of each of driving transistors Tr2 isoriented in the direction in which the source terminal of the switchingtransistor Tr1 extends. The drain terminal of the driving transistor Tr2is connected to each of pixel electrodes 17 through each of contactholes h1. The storage capacitors C are formed in the longitudinaldirection of the pixel electrode 17 above the power supply lines V_(dd).

FIG. 6 is a cross-sectional view taken along the line B-B′ of FIG. 5.Referring to FIG. 6, a laminated structure 30 in which the scanninglines V_(sel), an insulating interlayer film 21, the auxiliary cathodewiring 16, a planarizing film 20, ITO layers 18, and a bank layer 19 aresequentially laminated, is formed in the display area 11 on thesubstrate 15. The upper surface of the laminated structure 30 is coveredwith the film of the cathode 14. The insulating interlayer film 21 is afilm to electrically separate the scanning lines V_(sel) from theauxiliary cathode wiring 16. The linear auxiliary cathode line 16 isformed on the insulating interlayer film 21. The ITO layers 18 areislanded by patterning in the direction in which the auxiliary cathodeline 16 extends at multiple positions and are disposed on theplanarizing film 20, which covers the auxiliary cathode line 16. Contactholes h3 are formed in the planarizing film 20 so that the ITO layers 18are connected to the auxiliary cathode wiring 16 through the contactholes h3. The upper surface of the planarizing film 20 is covered withthe bank layer 19, which is made of a photosensitive organic material orthe like. Oval openings h2 are formed on the pixel electrodes 17 by aprecise alignment (see FIG. 5). Like the first embodiment,light-emitting sections OLED are formed in the openings h2.

On the surface of the bank layer 19, openings h4, which are alignedprecisely at multiple positions communicating to the ITO layers 18, aredisposed in the direction in which the auxiliary cathode line 16extends. The cathode 14 covering the bank layer 19 is connected to theITO layers 18 through the contact holes h4 and is also connected to theauxiliary cathode line 16. In this way, a plurality of the linearauxiliary cathode wiring 16 formed along the column direction of thepixels 10 are electrically connected to the cathode 14 so that thesufficient current is supplied to each of the pixels 10.

This embodiment allows, like the first embodiment, a reduction in theresistance of the cathode 14 and in the luminance non-uniformityresulting from non-uniformity of the currents supplied to the pixels 10.Additionally, contact of the auxiliary cathode wiring 16 with cathode 14is ensured within the laminated structure 30, thus reducing the width ofthe frame and resulting in a display panel with smaller dead space.Although one auxiliary cathode line 16 is disposed-every two columns inthis embodiment, it is not limited thereto and the auxiliary cathodewiring 16 may be disposed at a suitable density such as one line every nrows (n is an integer more than two).

Third Embodiment

FIG. 7 shows the layout of wiring in an organic EL display panel 100according to a third embodiment of the present invention. Thisembodiment differs from the first and second embodiments on the point ofthat auxiliary cathode wiring 16 are disposed in both the row and thecolumn directions. For the sake of distinguishing between the auxiliarycathode wiring 16 which are disposed in both the row and the columndirections, the auxiliary cathode wiring 16 disposed along the rowdirection are called first auxiliary cathode wiring 16-1, while theauxiliary cathode wiring 16 disposed along the column direction arecalled second auxiliary cathode wiring 16-2. When the “auxiliary cathodewiring 16” is simply used, it includes both. Referring to FIG. 7, whereone pixel consist of three RGB picture elements, three second auxiliarycathode wiring 16-2 are spaced uniformly every two pixels in the columndirection. Two data lines I_(dat) are disposed at two sides of each ofthe second auxiliary cathode wiring 16-2. Between adjacent secondauxiliary cathode wiring 16-2, two power supply lines V_(dd) are formedas a pair. The sum of the widths of one second auxiliary cathode line16-2 and the two data lines I_(dat) is substantially equal to the sum ofthe widths of the two power supply lines V_(dd). Therefore, the layoutof the wiring shown in this figure is arranged so as to have symmetryabout any column.

On the other hand, a pair of scanning lines V_(sel) and one firstauxiliary cathode line 16-1 are laid out alternately in the rowdirection. The scanning lines V_(sel) and the first auxiliary cathodewiring 16-1 are produced by simultaneously patterning the metal wiringin the same layer, respectively. The width of one first auxiliarycathode line 16-1 is adjusted so as to be substantially equal the sum ofthe widths of the two scanning lines V_(sel). Therefore, the layout ofthe wiring shown in this figure is arranged so as to have symmetry aboutany row and column.

Each of switching transistors Tr1 resides at each intersection of thescanning lines V_(sel) and the data lines I_(dat). The gate terminal ofeach of driving transistors Tr2 is positioned in the direction in whichthe source terminal of the switching transistor Tr1 extends. The drainterminal of the driving transistor Tr2 is connected to each of pixelelectrodes 17 through each of contact holes h1. Above the power supplylines V_(dd), storage capacitors C are formed parallel to thelongitudinal direction of the pixel electrode 17.

FIG. 8 is a cross-sectional view taken along the line C-C′ of FIG. 7.Referring to FIG. 8, a laminated structure 30 in which the firstauxiliary cathode line 16-1, insulating interlayer film 21, aplanarizing film 20, source metal layers 22, ITO layers 18, and a banklayer 19 are sequentially laminated, is formed on the display area 11and on the substrate 15. The upper surface of the laminated structure 30is covered with the film of a cathode 14. The insulating interlayer film21 is a film to electrically separate the data lines I_(dat) and thepower supply lines V_(dd) from the first auxiliary cathode line 16-1. Inthe same layer as the data lines I_(dat) and the power supply linesV_(dd), the second auxiliary cathode wiring 16-2 are disposed in thedirection orthogonal to the first auxiliary cathode line 16-1. The firstauxiliary cathode line 16-1 and the second auxiliary cathode wiring 16-2are electrically connected through contact holes h6 formed in theinsulating interlayer film 21.

On the insulating interlayer film films 21, the islanded source metallayers 22 are formed at multiple positions in the same layer as thesecond auxiliary cathode wiring 16-2 in the direction in which the firstauxiliary cathode line 16-1 extends.

The source metal layers 22 are connected to the first auxiliary cathodeline 16-1 through contact holes h5 formed in the insulating interlayerfilm 21. On the planarizing films 20, the islanded ITO layers 18 aredisposed in a direction in which the first auxiliary cathode line 16-1extend at multiple positions and are connected to the source metallayers 22 through contact holes h3. The hank layer 19, which is made ofa photosensitive organic material or the like is formed on theplanarizing films 20. Oval openings h2 are positioned on the pixelelectrode 17 by a precise alignment (see FIG. 7). Like the firstembodiment, light-emitting sections OLED are formed in the openings h2.In the surface of the bank layers 19, contact holes h4, which arealigned precisely at multiple positions communicating to the ITO layers18, are disposed in the direction in which the second auxiliary cathodewiring 16-2 extend. The cathode 14 formed on the bank layers 19 isconnected to the auxiliary cathode wiring 16 in the laminated structure30 so that the electrical resistance decreases and thus sufficientcurrent is supplied to each of the pixels 10.

FIG. 9 is a cross-sectional view taken along the line D-D′ of FIG. 7.Referring to FIG. 9, the laminated structure 30 in which the firstauxiliary cathode wiring 16-1, the scanning lines V_(sel), theinsulating interlayer film 21, the second auxiliary cathode line 16-2,the planarizing film 20, the ITO layers 18, and the bank layers 19 aresequentially laminated, is formed on the substrate 15. The firstauxiliary cathode wiring 16-1 and the second auxiliary cathode line 16-2are orthogonally disposed with sandwiching the insulating interlayerfilm 21 therebetween and are connected to each other through contactholes h6 formed in the insulating interlayer film 21. The islanded ITOlayers 18 are disposed on the planarizing films 20, which are laminatedon the second auxiliary cathode line 16-2, in the direction in which thesecond auxiliary cathode line 16-2 extends. The ITO layers 18 areconnected to the second auxiliary cathode line 16-2 through the contactholes h3 formed in the planarizing films 20. The contact holes h4 areformed in the bank layer 19 at multiple positions in the direction inwhich the second auxiliary cathode line 16-2 extends, thereby connectingthe cathode 14 with the ITO layers 18. In this way, the cathode 14 isconnected to the auxiliary cathode wiring 16, which are formed byorthogonal lines, in the laminated structure 30 so that the resistanceof the cathode 14 is greatly reduced and thus sufficient electricalpower is supplied to each of the pixels 10. Therefore, the luminancenon-uniformity resulting from non-uniformity of the currents supplied tothe pixels 10 is reduced, achieving excellent display performance.Additionally, contact of the auxiliary cathode wiring 16 with thecathode 14 is ensured within the laminated structure 30, thus reducingthe width of the frame and resulting in a display panel with smallerdead space.

Fourth Embodiment

FIG. 10 shows examples of electronic units to which the electro-opticalapparatus of the present invention is applicable. FIG. 10(a) shows anapplication to a mobile phone. A mobile phone 230 includes an antenna231, a sound-output section 232, a sound-input section 233, an operatingsection 234, and the organic EL display panel 100 of the presentinvention. The organic EL display panel 100 is usable as a display ofthe mobile phone 230. FIG. 10(b) shows an application to a video camera.A video camera 240 includes a picture-receiving section 241, anoperating section 242, a sound-input section 243, and the organic ELdisplay panel 100 of the present invention. The organic EL display panel100 is usable as a viewfinder or a display. FIG. 10(c) shows anapplication to a mobile personal computer. A computer 250 includes acamera 251, an operating section 252, and the organic EL display panel100 of the present invention. The organic EL display panel 100 of thepresent invention is usable as a display apparatus.

FIG. 10(d) shows an application to a head-mounted display. Ahead-mounted display 260 includes a band 261, an optical device holder262, and the organic EL display panel 100 of the present invention. Theorganic EL display panel 100 is usable as a source of displaying images.FIG. 10(e) shows an application to a rear-type projector. A projector270 includes a case 271, a light source 272, a combining optical system273, a mirror 274, a mirror 275, a screen 276, and the organic ELdisplay panel 100 of the present invention. FIG. 10(f) shows anapplication to a front-type projector. A projector 280 includes a case282, an optical system 281, and the organic EL display panel 100 of thepresent invention. Images can be displayed on a screen 283. Thus, theorganic EL display panel 100 of the present invention is usable as asource of displaying images.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an entire block diagram of an organic EL display panel of thepresent invention.

FIG. 2 shows a block diagram of a main pixel circuit.

FIG. 3 shows a layout of wiring of the first embodiment of the presentinvention.

FIG. 4 is a cross-sectional view taken along the line A-A′ of FIG. 3.

FIG. 5 shows a layout of wiring of the second embodiment of the presentinvention.

FIG. 6 is a cross-sectional view taken along the line B-B′ of FIG. 5.

FIG. 7 shows a layout of wiring of the third embodiment of the presentinvention.

FIG. 8 is a cross-sectional view taken along the line C-C′ of FIG. 7.

FIG. 9 is a cross-sectional view taken along the line D-D′ of FIG. 7.

FIG. 10 shows applications of the organic EL display panel of thepresent invention.

REFERENCE NUMERALS

-   10: pixels-   11: pixel area-   12: scanning line driver-   13: data line driver-   14: cathode-   15: substrate-   16: auxiliary cathode wiring-   16-1: first auxiliary cathode wiring-   16-2: second auxiliary cathode wiring-   17: pixel electrode-   18: ITO layer-   19: bank layer-   20: planarizing film-   21: insulating interlayer film-   30: laminated structure-   100: organic EL display panel-   Tr1: switching transistor-   Tr2: driving transistor-   C: storage capacitor-   OLED: light-emitting section-   V_(sel): scanning line-   I_(dat): data line-   V_(dd): power supply line

1. An electro-optical apparatus that constitutes electro-optical deviceshaving a laminated structure including a first electrode layer formedabove an effective area of a substrate, and a second electrode layerformed above the first electrode layer, the electro-optical apparatusincluding: first power lines that supply a voltage to the firstelectrode layer; and second power lines electrically connected to thesecond electrode layer, both the first and second power lines beingarranged above the effective area, and being arranged in the same layeras the first electrode layer or in a layer below the first electrodelayer; and the second power lines function as a cathode auxiliarywiring, and the second power lines being arranged in column and rowdirections of the effective area.
 2. The electro-optical apparatusaccording to claim 1, the second power lines arranged in the columndirection and the second power lines arranged in the row direction beingformed in different layers via an interlayer insulating film, and bothbeing electrically connected via a contact hole formed in the interlayerinsulating film.
 3. The electro-optical apparatus according to claim 2,the second power lines being formed in a line state in a predetermineddispersion density in any of the layers forming the interlayer laminatedstructure.
 4. The electro-optical apparatus according to claim 3, anarrangement pitch of the second power lines being at a substantiallyequal interval.
 5. The electro-optical apparatus according to claim 1,the second electrode layer has light transmissivity.
 6. Theelectro-optical apparatus according to claim 1, the electro-opticaldevices being electroluminescent devices.
 7. An electronic unit,comprising: the electro-optical apparatus according to claim
 1. 8. Anelectro-optical apparatus provided with a plurality of pixels includingelectro-optical devices having a laminated structure including a firstelectrode layer formed above an effective area of a substrate, and asecond electrode layer formed above the first electrode layer, theelectro-optical apparatus including: first power lines that supply avoltage to the first electrode layer, second power lines electricallyconnected to the second electrode layer; and a plurality of scanninglines and data lines connected to the plurality of pixels, the first andsecond power lines being arranged above the effective area, and beingarranged in the same layer as the first electrode layer or in a layerbelow the first electrode layer; and the wiring layout of the secondpower lines within the effective area being line symmetrical toarbitrary pixels arranged in parallel to the scanning lines or the datalines.
 9. The electro-optical apparatus according to claim 8, a linewidth of the second power lines being substantially the same as acombined line width of two of the scanning lines.
 10. Theelectro-optical apparatus according to claim 8, a line width of thesecond power lines is substantially the same as a combined line width oftwo of the data lines.
 11. An electro-optical apparatus comprising: asubstrate: a first electrode disposed above the substrate; a secondelectrode disposed over the first electrode; and an auxiliary wiringelectrically connected to the second electrode, the auxiliary wiringbeing disposed between the substrate and the first electrode and thefirst electrode being electrically separate from the auxiliary wiring.12. The electro-optical apparatus according to claim 11, a planarizinglayer being disposed between the second electrode and the substrate. 13.An electro-optical apparatus comprising: a substrate; a data linedisposed above the substrate; a first electrode disposed above the dataline; a second electrode disposed over the first electrode; and anauxiliary wiring electrically connected to the second electrode, theauxiliary wiring being disposed in the same layer as the data line andthe first electrode being electrically separate from the auxiliarywiring.
 14. An electro-optical apparatus comprising: a substrate; ascanning line disposed above the substrate; a first electrode disposedabove the scanning line; a second electrode disposed over the firstelectrode; and an auxiliary wiring electrically connected to the secondelectrode, the auxiliary wiring being disposed in the same layer as thescanning line and the first electrode being electrically separate fromthe auxiliary wiring.